Recherche avancée

Sur d’autres sites (11588)

• Anyone know of a set of C# bindings for FFMPEG ?

  31 août 2011, par MikeJ

  Does anyone know of a set of bindings for C# to drive the FFMpeg library directly ? I could shell to ffmpeg.exe directly but I found it hard to sync/control as a separate process. any help would be appreciated.

• Easy Tricks for Finding WebM Videos in YouTube

  9 août 2010, par noreply@blogger.com (John Luther)

  Since the WebM project launch, YouTube has been encoding videos uploaded at 720p or higher resolution in the WebM format. Today, the one million most popular videos of any size on YouTube are also available in the WebM format.

  We have instructions on our project site for finding these videos but they require adding a special parameter onto the end of each search query. All of the browsers that support WebM can create search shortcuts with custom parameters, however, so we’ve compiled instructions for making it very simple to search for WebM videos in YouTube.

  Important : First, make sure you have a supported browser and are enrolled in the YouTube HTML5 beta by going to http://youtube.com/html5 and clicking Enter the HTML5 Beta.

  Creating a WebM Search Shortcut

  Firefox 4 Beta :
  

  1. Select Bookmarks > Organize Bookmarks. A bookmark manager dialog opens.
  2. In the left column, choose a location for the new bookmark you’re creating. Next, choose Organize > New Bookmark (on MacOS click the gear icon). The new bookmark dialog opens.
  3. In the Name box, type WebM.
  4. In the Location box, type http://youtube.com/results?search_query=%s&webm=1.
  5. In the Keyword box, type webm.
  6. Click Add.

  Google Chrome Early Release Channel :
  

  1. On Windows and Linux, click the Chrome wrench icon in the toolbar and select Options. On MacOS, select Chrome > Preferences.
  2. On the Basics tab, click the Manage button in the Default Search section.
  3. On Windows and Linux, click Add. On MacOS X, click the plus (+) button.
  4. In the Name box, type WebM.
  5. In the Keyword box, type webm.
  6. In the URL box, type http://youtube.com/results?search_query=%s&webm=1.
  7. Click OK.

  Opera 10.60 and later :
  

  1. Go to http://youtube.com.
  2. Right-click in the YouTube search box at the top of the page and select Create Search. On MacOS, use Ctrl+click if you don’t a secondary mouse button enabled.
  3. In the Name box, type WebM.
  4. In the Keyword box, type webm.
  5. In the Address box, type http://youtube.com/results?search_query=%s&webm=1.
  6. Click OK.

  
  

  
  Now you’re ready to search. In the location box of the browser, type webm monster trucks. The YouTube search results page will open with a selection of monster truck videos encoded in the WebM format. When watching a video, look for the HTML5 WebM indicator in the player control bar.

  If you can’t find WebM videos it is most likely a browser cookie problem. Your enrollment in the YouTube HTML5 beta test is stored in a browser cookie (not in your YouTube or Google account), and that cookie can expire. Visit http://youtube.com/html5 and opt-in again to re-set the cookie.

  Directly Accessing WebM Videos by URL

  To find out if any YouTube video is available in WebM, simply add &html5=True (make sure True is capitalized) to the end of the video URL. If there is a WebM version of the video, it will open instead of the Flash version. For example :
  

  • Flash version : http://www.youtube.com/watch?v=Dz6gFokvOr0
  • WebM version : http://www.youtube.com/watch?v=Dz6gFokvOr0&html5=True

  

• ARM inline asm secrets

  6 juillet 2010, par Mans — ARM, Compilers

  Although I generally recommend against using GCC inline assembly, preferring instead pure assembly code in separate files, there are occasions where inline is the appropriate solution. Should one, at a time like this, turn to the GCC documentation for guidance, one must be prepared for a degree of disappointment. As it happens, much of the inline asm syntax is left entirely undocumented. This article attempts to fill in some of the blanks for the ARM target.
  

  Constraints

  Each operand of an inline asm block is described by a constraint string encoding the valid representations of the operand in the generated assembly. For example the “r” code denotes a general-purpose register. In addition to the standard constraints, ARM allows a number of special codes, only some of which are documented. The full list, including a brief description, is available in the constraints.md file in the GCC source tree. The following table is an extract from this file consisting of the codes which are meaningful in an inline asm block (a few are only useful in the machine description itself).

  f	Legacy FPA registers f0-f7.
  t	The VFP registers s0-s31.
  v	The Cirrus Maverick co-processor registers.
  w	The VFP registers d0-d15, or d0-d31 for VFPv3.
  x	The VFP registers d0-d7.
  y	The Intel iWMMX co-processor registers.
  z	The Intel iWMMX GR registers.
  l	In Thumb state the core registers r0-r7.
  h	In Thumb state the core registers r8-r15.
  j	A constant suitable for a MOVW instruction. (ARM/Thumb-2)
  b	Thumb only. The union of the low registers and the stack register.
  I	In ARM/Thumb-2 state a constant that can be used as an immediate value in a Data Processing instruction. In Thumb-1 state a constant in the range 0 to 255.
  J	In ARM/Thumb-2 state a constant in the range -4095 to 4095. In Thumb-1 state a constant in the range -255 to -1.
  K	In ARM/Thumb-2 state a constant that satisfies the I constraint if inverted. In Thumb-1 state a constant that satisfies the I constraint multiplied by any power of 2.
  L	In ARM/Thumb-2 state a constant that satisfies the I constraint if negated. In Thumb-1 state a constant in the range -7 to 7.
  M	In Thumb-1 state a constant that is a multiple of 4 in the range 0 to 1020.
  N	Thumb-1 state a constant in the range 0 to 31.
  O	In Thumb-1 state a constant that is a multiple of 4 in the range -508 to 508.
  Pa	In Thumb-1 state a constant in the range -510 to +510
  Pb	In Thumb-1 state a constant in the range -262 to +262
  Ps	In Thumb-2 state a constant in the range -255 to +255
  Pt	In Thumb-2 state a constant in the range -7 to +7
  G	In ARM/Thumb-2 state a valid FPA immediate constant.
  H	In ARM/Thumb-2 state a valid FPA immediate constant when negated.
  Da	In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with two Data Processing insns.
  Db	In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with three Data Processing insns.
  Dc	In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with four Data Processing insns. This pattern is disabled if optimizing for space or when we have load-delay slots to fill.
  Dn	In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov immediate instruction.
  Dl	In ARM/Thumb-2 state a const_vector which can be used with a Neon vorr or vbic instruction.
  DL	In ARM/Thumb-2 state a const_vector which can be used with a Neon vorn or vand instruction.
  Dv	In ARM/Thumb-2 state a const_double which can be used with a VFP fconsts instruction.
  Dy	In ARM/Thumb-2 state a const_double which can be used with a VFP fconstd instruction.
  Ut	In ARM/Thumb-2 state an address valid for loading/storing opaque structure types wider than TImode.
  Uv	In ARM/Thumb-2 state a valid VFP load/store address.
  Uy	In ARM/Thumb-2 state a valid iWMMX load/store address.
  Un	In ARM/Thumb-2 state a valid address for Neon doubleword vector load/store instructions.
  Um	In ARM/Thumb-2 state a valid address for Neon element and structure load/store instructions.
  Us	In ARM/Thumb-2 state a valid address for non-offset loads/stores of quad-word values in four ARM registers.
  Uq	In ARM state an address valid in ldrsb instructions.
  Q	In ARM/Thumb-2 state an address that is a single base register.

  Operand codes

  Within the text of an inline asm block, operands are referenced as %0, %1 etc. Register operands are printed as rN, memory operands as [rN, #offset], and so forth. In some situations, for example with operands occupying multiple registers, more detailed control of the output may be required, and once again, an undocumented feature comes to our rescue.

  Special code letters inserted between the % and the operand number alter the output from the default for each type of operand. The table below lists the more useful ones.

  c	An integer or symbol address without a preceding # sign
  B	Bitwise inverse of integer or symbol without a preceding #
  L	The low 16 bits of an immediate constant
  m	The base register of a memory operand
  M	A register range suitable for LDM/STM
  H	The highest-numbered register of a pair
  Q	The least significant register of a pair
  R	The most significant register of a pair
  P	A double-precision VFP register
  p	The high single-precision register of a VFP double-precision register
  q	A NEON quad register
  e	The low doubleword register of a NEON quad register
  f	The high doubleword register of a NEON quad register
  h	A range of VFP/NEON registers suitable for VLD1/VST1
  A	A memory operand for a VLD1/VST1 instruction
  y	S register as indexed D register, e.g. s5 becomes d2[1]