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Autres articles (45)
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Les autorisations surchargées par les plugins
27 avril 2010, parMediaspip core
autoriser_auteur_modifier() afin que les visiteurs soient capables de modifier leurs informations sur la page d’auteurs -
Support audio et vidéo HTML5
10 avril 2011MediaSPIP utilise les balises HTML5 video et audio pour la lecture de documents multimedia en profitant des dernières innovations du W3C supportées par les navigateurs modernes.
Pour les navigateurs plus anciens, le lecteur flash Flowplayer est utilisé.
Le lecteur HTML5 utilisé a été spécifiquement créé pour MediaSPIP : il est complètement modifiable graphiquement pour correspondre à un thème choisi.
Ces technologies permettent de distribuer vidéo et son à la fois sur des ordinateurs conventionnels (...) -
De l’upload à la vidéo finale [version standalone]
31 janvier 2010, parLe chemin d’un document audio ou vidéo dans SPIPMotion est divisé en trois étapes distinctes.
Upload et récupération d’informations de la vidéo source
Dans un premier temps, il est nécessaire de créer un article SPIP et de lui joindre le document vidéo "source".
Au moment où ce document est joint à l’article, deux actions supplémentaires au comportement normal sont exécutées : La récupération des informations techniques des flux audio et video du fichier ; La génération d’une vignette : extraction d’une (...)
Sur d’autres sites (7923)
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VP8 Documentation and Test Vector Contributions
14 octobre 2010, par noreply@blogger.com (John Luther)Janne Salonen of the WebM team in Oulu, Finland (formerly On2 Finland) has added a tabular description of the VP8 syntax to the VP8 Bitstream Guide. The new annex provides a concise reference of the elements in the bitstream and we hope will make implementing and testing VP8 decoders easier. The updated document and source can be downloaded from our documentation page.
We’re working on more improvements to the bitstream guide and invite other community members to help. As with the VP8 code, we gladly give attribution credit to documentation contributors and have added an AUTHORS file to the bitstream-guide Git repository.
New VP8 Test Vectors
The Oulu team has also produced some new VP8 test vectors. We analyzed a large set of WebM videos and produced two important corner use cases. The first produces the worst-case memory bandwidth (i.e., lots of global motion, all fractional motion vectors). The second produces the worst-case boolean decoder bin rate over dozens of consecutive frames. These vectors have been added to the VP8 test repository. Our team will consider other corner cases in the next batch of streams we add to the repository.
Aki Kuusela is Hantro Embedded Engineering Manager at Google.
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ARM inline asm secrets
Although I generally recommend against using GCC inline assembly, preferring instead pure assembly code in separate files, there are occasions where inline is the appropriate solution. Should one, at a time like this, turn to the GCC documentation for guidance, one must be prepared for a degree of disappointment. As it happens, much of the inline asm syntax is left entirely undocumented. This article attempts to fill in some of the blanks for the ARM target.
Constraints
Each operand of an inline asm block is described by a constraint string encoding the valid representations of the operand in the generated assembly. For example the “r” code denotes a general-purpose register. In addition to the standard constraints, ARM allows a number of special codes, only some of which are documented. The full list, including a brief description, is available in the constraints.md file in the GCC source tree. The following table is an extract from this file consisting of the codes which are meaningful in an inline asm block (a few are only useful in the machine description itself).
f Legacy FPA registers f0-f7. t The VFP registers s0-s31. v The Cirrus Maverick co-processor registers. w The VFP registers d0-d15, or d0-d31 for VFPv3. x The VFP registers d0-d7. y The Intel iWMMX co-processor registers. z The Intel iWMMX GR registers. l In Thumb state the core registers r0-r7. h In Thumb state the core registers r8-r15. j A constant suitable for a MOVW instruction. (ARM/Thumb-2) b Thumb only. The union of the low registers and the stack register. I In ARM/Thumb-2 state a constant that can be used as an immediate value in a Data Processing instruction. In Thumb-1 state a constant in the range 0 to 255. J In ARM/Thumb-2 state a constant in the range -4095 to 4095. In Thumb-1 state a constant in the range -255 to -1. K In ARM/Thumb-2 state a constant that satisfies the I constraint if inverted. In Thumb-1 state a constant that satisfies the I constraint multiplied by any power of 2. L In ARM/Thumb-2 state a constant that satisfies the I constraint if negated. In Thumb-1 state a constant in the range -7 to 7. M In Thumb-1 state a constant that is a multiple of 4 in the range 0 to 1020. N Thumb-1 state a constant in the range 0 to 31. O In Thumb-1 state a constant that is a multiple of 4 in the range -508 to 508. Pa In Thumb-1 state a constant in the range -510 to +510 Pb In Thumb-1 state a constant in the range -262 to +262 Ps In Thumb-2 state a constant in the range -255 to +255 Pt In Thumb-2 state a constant in the range -7 to +7 G In ARM/Thumb-2 state a valid FPA immediate constant. H In ARM/Thumb-2 state a valid FPA immediate constant when negated. Da In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with two Data Processing insns. Db In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with three Data Processing insns. Dc In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with four Data Processing insns. This pattern is disabled if optimizing for space or when we have load-delay slots to fill. Dn In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov immediate instruction. Dl In ARM/Thumb-2 state a const_vector which can be used with a Neon vorr or vbic instruction. DL In ARM/Thumb-2 state a const_vector which can be used with a Neon vorn or vand instruction. Dv In ARM/Thumb-2 state a const_double which can be used with a VFP fconsts instruction. Dy In ARM/Thumb-2 state a const_double which can be used with a VFP fconstd instruction. Ut In ARM/Thumb-2 state an address valid for loading/storing opaque structure types wider than TImode. Uv In ARM/Thumb-2 state a valid VFP load/store address. Uy In ARM/Thumb-2 state a valid iWMMX load/store address. Un In ARM/Thumb-2 state a valid address for Neon doubleword vector load/store instructions. Um In ARM/Thumb-2 state a valid address for Neon element and structure load/store instructions. Us In ARM/Thumb-2 state a valid address for non-offset loads/stores of quad-word values in four ARM registers. Uq In ARM state an address valid in ldrsb instructions. Q In ARM/Thumb-2 state an address that is a single base register. Operand codes
Within the text of an inline asm block, operands are referenced as %0, %1 etc. Register operands are printed as rN, memory operands as [rN, #offset], and so forth. In some situations, for example with operands occupying multiple registers, more detailed control of the output may be required, and once again, an undocumented feature comes to our rescue.
Special code letters inserted between the % and the operand number alter the output from the default for each type of operand. The table below lists the more useful ones.
c An integer or symbol address without a preceding # sign B Bitwise inverse of integer or symbol without a preceding # L The low 16 bits of an immediate constant m The base register of a memory operand M A register range suitable for LDM/STM H The highest-numbered register of a pair Q The least significant register of a pair R The most significant register of a pair P A double-precision VFP register p The high single-precision register of a VFP double-precision register q A NEON quad register e The low doubleword register of a NEON quad register f The high doubleword register of a NEON quad register h A range of VFP/NEON registers suitable for VLD1/VST1 A A memory operand for a VLD1/VST1 instruction y S register as indexed D register, e.g. s5 becomes d2[1] -
Pass a process to a subclass
16 décembre 2014, par BrettI would like to pass a process to a subclass so I may kill it but I can’t figure out how to pass the process. I’m unsure how to store it so I can return it to the form and be able to call the subclass method to kill it. here are my classes
package my.mashformcnts;
import java.io.IOException;
import java.util.Scanner;
import java.util.regex.Pattern;
/**
*
* @author brett
*/
public class MashRocks {
public static Process startThread(MashFormCnts mashFormCnts) throws IOException {
ProcessBuilder pb = new ProcessBuilder("ffmpeg", "-i", "C:\\Users\\brett\\Documents\\Telegraph_Road.mp4", "C:\\Users\\brett\\Documents\\out.mp4");
//Here is where i would like to name and store the Process
final Process p = pb.start();
// create a new thread to get progress from ffmpeg command , override
// it's run method, and start it!
Thread t = new Thread() {
@Override
public void run() {
Scanner sc = new Scanner(p.getErrorStream());
// Find duration
Pattern durPattern = Pattern.compile("(?<=Duration: )[^,]*");
String dur = sc.findWithinHorizon(durPattern, 0);
if (dur == null) {
throw new RuntimeException("Could not parse duration.");
}
String[] hms = dur.split(":");
double totalSecs = Integer.parseInt(hms[0]) * 3600 + Integer.parseInt(hms[1]) * 60 + Double.parseDouble(hms[2]);
System.out.println("Total duration: " + totalSecs + " seconds.");
// Find time as long as possible.
Pattern timePattern = Pattern.compile("(?<=time=)[\\d:.]*");
String match;
String[] matchSplit;
//MashForm pgbar = new MashForm();
while (null != (match = sc.findWithinHorizon(timePattern, 0))) {
matchSplit = match.split(":");
double progress = (Integer.parseInt(matchSplit[0]) * 3600 + Integer.parseInt(matchSplit[1]) * 60 + Double.parseDouble(matchSplit[2])) / totalSecs;
int prog = (int) (progress * 100);
mashFormCunts.setbar(prog);
}
}
};
t.start();
return p;
}
public synchronized static void stop(Thread t) throws IOException{
Runtime.getRuntime().exec("taskkill /F /IM ffmpeg.exe");
t = null;
//t.interrupt();
}
}
class killMash extends MashRocks{
public static void Kfpeg(Process p){
p.destroyForcibly();
}
}So those are my classes. I’m very new.
Next there is the event Listener on the form, so when I click this I want to kill the ffmpeg proecess with the
Thread t
:private void jButton2ActionPerformed(java.awt.event.ActionEvent evt) {
// TODO add your handling code here:
Thread n = Thread.currentThread();
System.out.print(n);
try {
//MashRocks.stop(n);
//This isnt working but i think its closer
killMash.Kfpeg(MashRocks.startThread(this));
//Not Sure what to do here
//here is where i want to pass the process sorry for the typo
killMash.kfpeg(p);
} catch (IOException ex) {
Logger.getLogger(MashFormCunts.class.getName()).log(Level.SEVERE, null, ex);
}
}Any help is awesome cheers