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Sur d’autres sites (10398)

  • lavc/vc1dsp : R-V V vc1_unescape_buffer

    12 mai 2024, par Rémi Denis-Courmont
    lavc/vc1dsp : R-V V vc1_unescape_buffer

    Notes :

    - The loop is biased toward no unescaped bytes as that should be most common.

    - The input byte array is slid rather than the (8 times smaller) bit-mask,
    
  as RISC-V V does not provide a bit-mask (or bit-wise) slide instruction.

    - There are two comparisons with 0 per iteration, for the same reason.

    - In case of match, bytes are copied until the first match, and the loop is
    
  restarted after the escape byte. Vector compression (vcompress.vm) could
    
  discard all escape bytes but that is slower if escape bytes are rare.
    

    Further optimisations should be possible, e.g. :

    - processing 2 bytes fewer per iteration to get rid of a 2 slides,

    - taking a short cut if the input vector contains less than 2 zeroes.
    
But this is a good starting point :
    

    T-Head C908 :
    
vc1dsp.vc1_unescape_buffer_c :      12749.5
    
vc1dsp.vc1_unescape_buffer_rvv_i32 : 6009.0
    

    SpacemiT X60 :
    
vc1dsp.vc1_unescape_buffer_c :      11038.0
    
vc1dsp.vc1_unescape_buffer_rvv_i32 : 2061.0
    • [DH] libavcodec/riscv/vc1dsp_init.c
    • [DH] libavcodec/riscv/vc1dsp_rvv.S

  • lavc/vp8dsp : add R-V V vp7_idct_dc_add4y

    1er juin 2024, par Rémi Denis-Courmont
    lavc/vp8dsp : add R-V V vp7_idct_dc_add4y

    As with idct_dc_add, most of the code is shared with, and replaces, the
    
previous VP8 function. To improve performance, we break down the 16x4
    
matrix into 4 rows, rather than 4 squares. Thus strided loads and
    
stores are avoided, and the 4 DC calculations are vectored.
    
Unfortunately this requires a vector gather to splat the DC values, but
    
overall this is still a win for performance :
    

    T-Head C908 :
    
vp7_idct_dc_add4y_c :       7.2
    
vp7_idct_dc_add4y_rvv_i32 : 2.2
    
vp8_idct_dc_add4y_c :       6.2
    
vp8_idct_dc_add4y_rvv_i32 : 2.2 (before)
    
vp8_idct_dc_add4y_rvv_i32 : 1.7
    

    SpacemiT X60 :
    
vp7_idct_dc_add4y_c :       6.2
    
vp7_idct_dc_add4y_rvv_i32 : 2.0
    
vp8_idct_dc_add4y_c :       5.5
    
vp8_idct_dc_add4y_rvv_i32 : 2.5 (before)
    
vp8_idct_dc_add4y_rvv_i32 : 1.7
    

    I also tried to provision the DC values using indexed loads. It ends up
    
slower overall, especially for VP7, as we then have to compute 16 DC's
    
instead of just 4.
    • [DH] libavcodec/riscv/vp7dsp_init.c
    • [DH] libavcodec/riscv/vp7dsp_rvv.S
    • [DH] libavcodec/riscv/vp8dsp_rvv.S

  • sws/input : R-V V 32-bit RGB to halved UV

    6 juin 2024, par Rémi Denis-Courmont
    sws/input : R-V V 32-bit RGB to halved UV

    T-Head C908 :
    
abgr_to_uv_half_8_c :            2.2
    
abgr_to_uv_half_8_rvv_i32 :      3.5
    
abgr_to_uv_half_128_c :         44.0
    
abgr_to_uv_half_128_rvv_i32 :   13.0
    
abgr_to_uv_half_1080_c :       245.0
    
abgr_to_uv_half_1080_rvv_i32 : 107.2
    
abgr_to_uv_half_1920_c :       406.2
    
abgr_to_uv_half_1920_rvv_i32 : 188.7
    
bgra_to_uv_half_8_c :            2.2
    
bgra_to_uv_half_8_rvv_i32 :      3.5
    
bgra_to_uv_half_128_c :         26.5
    
bgra_to_uv_half_128_rvv_i32 :   13.0
    
bgra_to_uv_half_1080_c :       219.7
    
bgra_to_uv_half_1080_rvv_i32 : 107.0
    
bgra_to_uv_half_1920_c :       406.7
    
bgra_to_uv_half_1920_rvv_i32 : 188.7
    

    SpacemiT X60 :
    
abgr_to_uv_half_8_c :           2.2
    
abgr_to_uv_half_8_rvv_i32 :     3.0
    
abgr_to_uv_half_128_c :        28.2
    
abgr_to_uv_half_128_rvv_i32 :   5.7
    
abgr_to_uv_half_1080_c :      235.5
    
abgr_to_uv_half_1080_rvv_i32 : 47.7
    
abgr_to_uv_half_1920_c :      418.2
    
abgr_to_uv_half_1920_rvv_i32 : 84.0
    
bgra_to_uv_half_8_c :           2.0
    
bgra_to_uv_half_8_rvv_i32 :     3.0
    
bgra_to_uv_half_128_c :        23.7
    
bgra_to_uv_half_128_rvv_i32 :   5.7
    
bgra_to_uv_half_1080_c :      195.5
    
bgra_to_uv_half_1080_rvv_i32 : 47.7
    
bgra_to_uv_half_1920_c :      346.5
    
bgra_to_uv_half_1920_rvv_i32 : 84.0
    • [DH] libswscale/riscv/input_rvv.S
    • [DH] libswscale/riscv/swscale.c

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