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Rennes Emotion Map 2010-11
19 octobre 2011, par
Mis à jour : Juillet 2013
Langue : français
Type : Texte
Autres articles (61)
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Mise à jour de la version 0.1 vers 0.2
24 juin 2013, parExplications des différents changements notables lors du passage de la version 0.1 de MediaSPIP à la version 0.3. Quelles sont les nouveautés
Au niveau des dépendances logicielles Utilisation des dernières versions de FFMpeg (>= v1.2.1) ; Installation des dépendances pour Smush ; Installation de MediaInfo et FFprobe pour la récupération des métadonnées ; On n’utilise plus ffmpeg2theora ; On n’installe plus flvtool2 au profit de flvtool++ ; On n’installe plus ffmpeg-php qui n’est plus maintenu au (...) -
Personnaliser en ajoutant son logo, sa bannière ou son image de fond
5 septembre 2013, parCertains thèmes prennent en compte trois éléments de personnalisation : l’ajout d’un logo ; l’ajout d’une bannière l’ajout d’une image de fond ;
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Ecrire une actualité
21 juin 2013, parPrésentez les changements dans votre MédiaSPIP ou les actualités de vos projets sur votre MédiaSPIP grâce à la rubrique actualités.
Dans le thème par défaut spipeo de MédiaSPIP, les actualités sont affichées en bas de la page principale sous les éditoriaux.
Vous pouvez personnaliser le formulaire de création d’une actualité.
Formulaire de création d’une actualité Dans le cas d’un document de type actualité, les champs proposés par défaut sont : Date de publication ( personnaliser la date de publication ) (...)
Sur d’autres sites (10174)
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Video files recorded in Google Chrome have stuttering audio
4 juin 2018, par maxpajBackground
I’m developing a platform where users can record videos of themselves or their screen and send them as video messages to customers / clients.
I have limited users to only using my application with Google Chrome and I’m using the MediaRecorder API to record the video data from the users screen or webcamera. The codecs that are used for recording are VP8/OPUS (WEBM container).
I need the videos to run in as many browsers as possible, so I’m using a 3rd party service to transcode videos from whatever format I’m getting from the users to a H.265/AAC MP4 container (caniuse MPEG-4/H.264).
Issue
Lately I’ve seen that some videos recorded on Mac OSX machines have the video and audio out of sync or that the video and audio stutters, depending on which player I’m using. I call these video files corrupt, for lack of a better word. Playing a corrupt file in Google Chrome renders smooth playing audio. Playing the video in VLC on my Windows machine renders stuttering audio.
When I run the corrupt video files through the transcoding service I get video files with stuttering audio, no matter which player I’m using.
This is an unwanted result and pretty much unacceptable since the audio needs to be smooth in order for the recipient of a video to not be bothered with the quality.
Debugging
According to the transcoding service support, this happens because of their mechanisms that try to sync up the audio and video from the corrupt file :
Inspecting our encoding logs, I’ve noticed the following kind of
warnings :[2018-05-16 14:08:38.009] [pcm_s16le @ 0x1d608c0] pcm_encode_frame :
filling in for 5856 missing samples (122 ms) before pts 40800 to
correct sync ! [2018-05-16 14:08:38.009] [pcm_s16le @ 0x1d608c0]
pcm_encode_frame : dropping 2880 samples (60 ms) at pts 43392 to help
correct sync to -3168 samples (-66 ms) !The problem here comes from the way that the audio in the original
source file is encoded.-
you should ensure that the audio is not out of sync (audio timestamps
are correct) in your source file before submitting the jobRunning a corrupt file through ffmpeg on my own machine, re-encoding with the same codecs, produces the same kind of stuttering video. The logs produce an alarming amount of errors. Here is a sample of the log output :
[libopus @ 0000029938e24d80] Queue input is backward in timeitrate= 194.8kbits/s dup=0 drop=5 speed=0.31x
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15434, current: 15394; changing to 15434. This may result in incorrect timestamps in the output file.
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15434, current: 15414; changing to 15434. This may result in incorrect timestamps in the output file.
[libopus @ 0000029938e24d80] Queue input is backward in timeitrate= 193.3kbits/s dup=0 drop=5 speed=0.309x
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15539, current: 15499; changing to 15539. This may result in incorrect timestamps in the output file.
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15539, current: 15519; changing to 15539. This may result in incorrect timestamps in the output file.
[libopus @ 0000029938e24d80] Queue input is backward in timeitrate= 192.0kbits/s dup=0 drop=5 speed=0.308x
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15667, current: 15627; changing to 15667. This may result in incorrect timestamps in the output file.
[webm @ 0000029938e09b00] Non-monotonous DTS in output stream 0:1; previous: 15667, current: 15647; changing to 15667. This may result in incorrect timestamps in the output file.
[libopus @ 0000029938e24d80] Queue input is backward in timeI tried running the same inputs through another transcoding service and those outputs worked a lot better - video was still stuttering but the audio played smoothly, which is more important to the use case of my application.
To my knowledge, this have so far only occurred for users on Mac OSX machines.
Questions
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Is there anything I can do to have the files work better ? Or is this entirely a consequence of how encoding of video and audio in Google Chrome works ?
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One step in the right direction would be to just be able to detect when the video is corrupt. How can I do that ?
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ARM inline asm secrets
Although I generally recommend against using GCC inline assembly, preferring instead pure assembly code in separate files, there are occasions where inline is the appropriate solution. Should one, at a time like this, turn to the GCC documentation for guidance, one must be prepared for a degree of disappointment. As it happens, much of the inline asm syntax is left entirely undocumented. This article attempts to fill in some of the blanks for the ARM target.
Constraints
Each operand of an inline asm block is described by a constraint string encoding the valid representations of the operand in the generated assembly. For example the “r” code denotes a general-purpose register. In addition to the standard constraints, ARM allows a number of special codes, only some of which are documented. The full list, including a brief description, is available in the constraints.md file in the GCC source tree. The following table is an extract from this file consisting of the codes which are meaningful in an inline asm block (a few are only useful in the machine description itself).
f Legacy FPA registers f0-f7. t The VFP registers s0-s31. v The Cirrus Maverick co-processor registers. w The VFP registers d0-d15, or d0-d31 for VFPv3. x The VFP registers d0-d7. y The Intel iWMMX co-processor registers. z The Intel iWMMX GR registers. l In Thumb state the core registers r0-r7. h In Thumb state the core registers r8-r15. j A constant suitable for a MOVW instruction. (ARM/Thumb-2) b Thumb only. The union of the low registers and the stack register. I In ARM/Thumb-2 state a constant that can be used as an immediate value in a Data Processing instruction. In Thumb-1 state a constant in the range 0 to 255. J In ARM/Thumb-2 state a constant in the range -4095 to 4095. In Thumb-1 state a constant in the range -255 to -1. K In ARM/Thumb-2 state a constant that satisfies the I constraint if inverted. In Thumb-1 state a constant that satisfies the I constraint multiplied by any power of 2. L In ARM/Thumb-2 state a constant that satisfies the I constraint if negated. In Thumb-1 state a constant in the range -7 to 7. M In Thumb-1 state a constant that is a multiple of 4 in the range 0 to 1020. N Thumb-1 state a constant in the range 0 to 31. O In Thumb-1 state a constant that is a multiple of 4 in the range -508 to 508. Pa In Thumb-1 state a constant in the range -510 to +510 Pb In Thumb-1 state a constant in the range -262 to +262 Ps In Thumb-2 state a constant in the range -255 to +255 Pt In Thumb-2 state a constant in the range -7 to +7 G In ARM/Thumb-2 state a valid FPA immediate constant. H In ARM/Thumb-2 state a valid FPA immediate constant when negated. Da In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with two Data Processing insns. Db In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with three Data Processing insns. Dc In ARM/Thumb-2 state a const_int, const_double or const_vector that can be generated with four Data Processing insns. This pattern is disabled if optimizing for space or when we have load-delay slots to fill. Dn In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov immediate instruction. Dl In ARM/Thumb-2 state a const_vector which can be used with a Neon vorr or vbic instruction. DL In ARM/Thumb-2 state a const_vector which can be used with a Neon vorn or vand instruction. Dv In ARM/Thumb-2 state a const_double which can be used with a VFP fconsts instruction. Dy In ARM/Thumb-2 state a const_double which can be used with a VFP fconstd instruction. Ut In ARM/Thumb-2 state an address valid for loading/storing opaque structure types wider than TImode. Uv In ARM/Thumb-2 state a valid VFP load/store address. Uy In ARM/Thumb-2 state a valid iWMMX load/store address. Un In ARM/Thumb-2 state a valid address for Neon doubleword vector load/store instructions. Um In ARM/Thumb-2 state a valid address for Neon element and structure load/store instructions. Us In ARM/Thumb-2 state a valid address for non-offset loads/stores of quad-word values in four ARM registers. Uq In ARM state an address valid in ldrsb instructions. Q In ARM/Thumb-2 state an address that is a single base register. Operand codes
Within the text of an inline asm block, operands are referenced as %0, %1 etc. Register operands are printed as rN, memory operands as [rN, #offset], and so forth. In some situations, for example with operands occupying multiple registers, more detailed control of the output may be required, and once again, an undocumented feature comes to our rescue.
Special code letters inserted between the % and the operand number alter the output from the default for each type of operand. The table below lists the more useful ones.
c An integer or symbol address without a preceding # sign B Bitwise inverse of integer or symbol without a preceding # L The low 16 bits of an immediate constant m The base register of a memory operand M A register range suitable for LDM/STM H The highest-numbered register of a pair Q The least significant register of a pair R The most significant register of a pair P A double-precision VFP register p The high single-precision register of a VFP double-precision register q A NEON quad register e The low doubleword register of a NEON quad register f The high doubleword register of a NEON quad register h A range of VFP/NEON registers suitable for VLD1/VST1 A A memory operand for a VLD1/VST1 instruction y S register as indexed D register, e.g. s5 becomes d2[1] -
Logic and lawyers
22 mai 2013, par Mans — Law and libertyReading about various patent litigation cases, I am struck by the frequency with which common logical fallacies such as the Appeal to Consequences are committed. We shall look at a couple of recent examples.
In conjunction with the Federal Circuit ruling in CLS Bank v. Alice Corp., Judge Moore, joined by three others, filed a dissenting opinion wherein we find the following :
I am concerned that the current interpretation of § 101, and in particular the abstract idea exception, is causing a free fall in the patent system. [...] And let’s be clear : if all of these claims, including the system claims, are not patent-eligible, this case is the death of hundreds of thousands of patents [...].
A footnote adds :
If the reasoning of Judge Lourie’s opinion were adopted, it would decimate the electronics and software industries. [...] There has never been a case which could do more damage to the patent system than this one.
From the above, I get the impression Moore is primarily concerned with protecting the system, maintaining the status quo, less with ruling in line with the logical consequences of statute and case law. Furthermore, her argument rests on the premise that a weaker patent system would “decimate the industries,” a notion supported by little evidence, yet presented by Moore as an obvious truth. In fact, research exists suggesting that many important innovations are never actually patented. Let us also not overlook the fact that European companies do not appear to be suffering from the much weaker patent protection for software afforded there.
Judge Moore’s reasoning can be summarised in three steps :
- Ruling this way could be disruptive to the patent system.
- The industry relies on patents.
- Therefore we must not rule this way.
Not only does she commit the aforementioned logical fallacy, she does so by way of invalid arguments.
The second example of such fallacious reasoning comes from the Supreme Court ruling in Bowman v. Monsanto :
We have always drawn the boundaries of the exhaustion doctrine to exclude that activity [copying], so that the patentee retains an undiminished right to prohibit others from making the thing his patent protects. [...] That is because, once again, if simple copying were a protected use, a patent would plummet in value after the first sale of the first item containing the invention. The undiluted patent monopoly, it might be said, would extend not for 20 years (as the Patent Act promises), but for only one transaction. And that would result in less incentive for innovation than Congress wanted. Hence our repeated insistence that exhaustion applies only to the particular item sold, and not to reproductions.
Here we find the same pattern repeated. The aim of the court appears to have been ensuring the continued validity of this class of patents, not reaching a logical conclusion regarding the question of infringement. Once again, we can break the reasoning down into three steps :
- A non-infringement ruling would weaken the patent.
- Weaker patents would provide less incentive for innovation.
- Therefore we must rule infringement.
As in the first example, the argument presented in step two is at best questionable, and no supporting evidence is provided.
These are, unfortunately, not the only examples of such fallacies ; one might even describe them as ubiquitous. Does a law education not include any material on logical reasoning ? Ought it not ? While we can never hope to find any kind of universal truth on which to base our laws, we should at least strive to make our system logically consistent. If we do not, notions such as fairness and justice lose their meanings.